CS6303 CS8491 Computer Architecture

CS6303 Computer Architecture Nov/Dec 2016 Anna University Question Paper

ec8552-syllabus-computer-architecture-and-organization-regulation-2017-anna-university

CS6303 Computer Architecture Nov/Dec 2016 Anna University Question paper Nov/Dec 2016 Here you can get Previous Year Question paper Recent Question Papers 2marks syllabus 2013 regulation etc.  To Score more in your semester exams Get best score in your semester exams without any struggle. Just refer the previous year questions from our website. At the last time of examination you won’t be able to refer the whole book. We know students find it difficult to score better in university exams so we make it easy to assemble, use, and even reuse the frequently asked questions. We are a library of questions which are asked frequently, all you need to do is to refer our website and get the CS6303 Computer Architecture Anna university Question paper Nov/Dec 2016

Students who are already keeping good score should use previous questions only for reference. It may help you to get full score. For such students a small advice is that, after studying the entire portions, one can use these recent year questions for revision. Our recentquestionpaper.com is meant for practicing and revising what one has studied and for you to assure pass mark who find it difficult to study the full portion. It helps you to know the range of questions asked in semester exam.

Department of Computer Science and Engineering

Sub. Name: Computer Architecture                                   Sub.Code: CS6303

Max.Marks: 100                                                                     Time: 180 min

Department: Computer Science and Engineering             Sem/Year: III/II       Date:

Model Exam – I

PART – A                              10x 2=20

1.        What is instruction register?                                                                    (CO1)

In computing, an instruction register (IR) is the part of a CPU's control unit that holds the instruction currently being executed or decoded

2.        What is program counter?                                                                       (CO1)

A program counter is a register in a computer processor that contains the address (location) of the instruction being executed at the current time. As each instruction gets fetched, the program counter increases its stored value by 1.

3.        What is arithmetic overflow?                                                                   (CO2)

In computer programming, an integer overflow occurs when an arithmetic operation attempts to create a numeric value that is outside of the range that can be represented with a given number of bits – either larger than the maximum or lower than the minimum representable value.

4.        What is Carry Save addition?                                                  (CO2)

A carry-save adder is a type of digital adder, used in computer microarchitecture to compute the sum of three or more n-bit numbers in binary.

5.        What is meant by data hazard in pipelining?                                            (CO3)

Data hazards occur when the pipeline changes the order of read/write accesses to operands so that the order differs from the order seen by sequentially executing instructions on the unpipelined machine. 

6.        What is side effect?                                                                                 (CO3)

Side effect (computer science) In computer science, a function or expression is said to have a side effect if it modifies some state outside its scope or has an observableinteraction with its calling functions or the outside world besides returning a value.

7.        Define Reorder buffer.                                                                            (CO4)

A re-order buffer (ROB) is used in a Tomasulo algorithm for out-of-order instruction execution. It allows instructions to be committed in-order. 

8.        What is In order commit?                                                                        (CO4)

A re-order buffer (ROB) is used in a Tomasulo algorithm for out-of-order instruction execution. It allows instructions to be committed in-order. 

9.        Define write through and write buffer.                                                    (CO5)

Write-through cache directs write I/O onto cache and through to underlying permanent storage before confirming I/O completion to the host. 

10.     What is write-back?                                                                                 (CO5)

Write-back cache is where write I/O is directed to cache and completion is immediately confirmed to the host. This results in low latency and high throughput for write-intensive applications, but there is data availability exposure risk because the only copy of the written data is in cache. 

PART – B                                              13 x 5=65

11.a.Discuss in detail about Instruction performance and CPU performance of a computer                                                                                                                                   (CO1)

Or

11.b What are the various logical operations and explain the instructions supporting the logical operations.                                                                                                          (CO1)

12.a.Explain the floating point addition and subtraction                                          (CO2)(7+6)

Or

12.b. Give the block diagram for a adder and revised  and discuss its operation. (CO2)

13. a. Explain the data path and control consideration of a pipeline organization and explain                                                                                                                 (CO3)

Or

13.b. What is instruction hazards? Explain in detail how to handle the instruction hazards in pipelining with relevant examples                                                                           (CO3)(4+9)

14.a. Explain challenges in parallel processing                                                        (CO4)

Or

14.b. Explain in detail about Hardware multithreading                                            (CO4)

15.a. Discuss DMA controller with block diagram                                 (CO5)

Or

15.b. Explain the need for cache memory and discuss the different types of mapping functions with necessary block diagram                                                                             (CO5) (5+8)

Part C                                                                                     1 x 15=15

16. Explain details about the Instruction architecture used in graphical system(CO3)

Or

16. Explain details about the Intel core Processor and its architecture.(CO4)

CS6303 Computer Architecture Question

CS6303 Computer Architecture Nov/Dec 2016 Anna University Question Paper

ec8552-syllabus-computer-architecture-and-organization-regulation-2017-anna-university

CS6303 Computer Architecture Nov/Dec 2016 Anna University Question paper Nov/Dec 2016 Here you can get Previous Year Question paper Recent Question Papers 2marks syllabus 2013 regulation etc.  To Score more in your semester exams Get best score in your semester exams without any struggle. Just refer the previous year questions from our website. At the last time of examination you won’t be able to refer the whole book. We know students find it difficult to score better in university exams so we make it easy to assemble, use, and even reuse the frequently asked questions. We are a library of questions which are asked frequently, all you need to do is to refer our website and get the CS6303 Computer Architecture Anna university Question paper Nov/Dec 2016

Students who are already keeping good score should use previous questions only for reference. It may help you to get full score. For such students a small advice is that, after studying the entire portions, one can use these recent year questions for revision. Our recentquestionpaper.com is meant for practicing and revising what one has studied and for you to assure pass mark who find it difficult to study the full portion. It helps you to know the range of questions asked in semester exam.

Department of Computer Science and Engineering

Sub. Name: Computer Architecture                                   Sub.Code: CS6303

Max.Marks: 100                                                                     Time: 180 min

Department: Computer Science and Engineering             Sem/Year: III/II       Date:

Model Exam – I

PART – A                              10x 2=20

1.        What is mainframe computer?                                                 (CO1)

Mainframe computers (colloquially referred to as "big iron") arecomputers used primarily by large organizations for critical applications, bulk data processing, such as census, industry and consumer statistics, enterprise resource planning, and transaction processing.

2.        Define microcomputer.                                                                            (CO1)

A microcomputer is a small, relatively inexpensive computer with a microprocessor as its central processing unit (CPU). It includes a microprocessor, memory, and minimal input/output (I/O) circuitry mounted on a single printed circuit board.

3.        What is overflow and underflow case in single precision?                      (CO2)

A processing system that determines whether an underflow or overflow condition has occurred concurrently with the determination of the floating point exponent result uses a group of latched constants which can be added to the intermediate exponent and the exponent adjust to determine out of range conditions for all cases.

4.     Discuss the IEEE format used for representing single- precision floating point numbers.                                                                                              (CO2)

Single-precision floating-point format is a computer number format that occupies 4 bytes (32 bits) in computer memory and represents a wide dynamic range of values by using a floating point. In IEEE 754-2008 the 32-bit base-2 format is officially referred to as binary32. It was called single in IEEE 754-1985.

5.        What is pipeline register delay?                                                               (CO3)

Pipeline overhead arises from the combination of pipeline register delay (setup time plus propagation delay) and clock skew.

6.        What is data path?                                                                                   (CO3)

A datapath is a collection of functional units (such as arithmetic logic units or multipliers, that perform dataprocessing operations), registers, and buses. Along with the control unit it composes the central processing unit (CPU).

7.        Define Register renaming.                                                                       (CO4)

Register renaming is a form of pipelining that deals with data dependences between instructions by renaming their register operands.

8.        Define Commit unit.                                                                                (CO4)

In Tomasulo algorithm, there is an additional stage "Commit". In this stage, the results of instructions will be stored in a register or memory. 

9.        What is cache memory?                                                                           (CO5)

Cache memory is a small-sized type of volatile computer memory that provides high-speed data access to a processor and stores frequently used computer programs, applications and data.

10.     What is Direct mapped cache?                                                                 (CO5)

In Full Associative Mapping Summary, the address is broken into two parts: a tag used to identify which block is stored in which line of the cache (s bits) and a fixed number of LSB bits identifying the word within the block (w bits).

PART – B                                              13 x 5=65

11.     a.Explain the architecture of a basic Computer system.                           (CO1)

Or

11.b Briefly discuss about Uniprocessor versus Multiprocessor and CPU performance of a computer                                                                                 (CO1)(7+6)

12.a.Give the block diagram for a floating point adder and subtraction unit and discuss its operation.                                                                                   (CO2)

or

12.b. Explain in detail about the carry look ahead adder.                 (CO2)

13.a.Describe the techniques for handling control hazard in pipelining(CO3)

Or

13.b. Briefly explain the speedup performance models for pipelining(CO3)

14.a. Explain MISD and MIMD with an example                          (CO4)(7+6)

or

14.b.Discuss briefly about the motivation of Multi-core computing(CO4)

15.a Write short note on I/O processor. Describe the functions of SCSI interface with a neat diagram                                                                                  (CO5)

or

15.b .Explain the need for memory hierarchy technology with a four-level memory                                                                                                              (CO5)

Part C                                                                             1 x 15=15

16. Explain details about the Intel core Processor and its architecture.(CO4)

Or

16. Briefly explain the speedup performance models for dual core processor pipelining(CO3)

CS6303 Computer Architecture

CS6303 Computer Architecture Nov/Dec 2016 Anna University Question Paper

ec8552-syllabus-computer-architecture-and-organization-regulation-2017-anna-university

CS6303 Computer Architecture Nov/Dec 2016 Anna University Question paper Nov/Dec 2016 Here you can get Previous Year Question paper Recent Question Papers 2marks syllabus 2013 regulation etc.  To Score more in your semester exams Get best score in your semester exams without any struggle. Just refer the previous year questions from our website. At the last time of examination you won’t be able to refer the whole book. We know students find it difficult to score better in university exams so we make it easy to assemble, use, and even reuse the frequently asked questions. We are a library of questions which are asked frequently, all you need to do is to refer our website and get the CS6303 Computer Architecture Anna university Question paper Nov/Dec 2016

Students who are already keeping good score should use previous questions only for reference. It may help you to get full score. For such students a small advice is that, after studying the entire portions, one can use these recent year questions for revision. Our recentquestionpaper.com is meant for practicing and revising what one has studied and for you to assure pass mark who find it difficult to study the full portion. It helps you to know the range of questions asked in semester exam.

Department of Computer Science and Engineering

Sub. Name: Computer Architecture                                   Sub.Code: CS6303

Max.Marks: 100                                                                     Time: 180 min

Department: Computer Science and Engineering             Sem/Year: III/II       Date:

Model Exam – I

PART – A                              10x 2=20

1.        What is RISC and CISC?                                                                        (CO1)

The architectural designs of CPU are RISC (Reduced instruction set computing) and CISC (Complex instruction set computing). CISC has the ability to execute addressing modes or multi-step operations within one instruction set. It is the design of the CPU where one instruction performs many low-level operations

2.        List out the methods used to improve system performance.                    (CO1)

The time to execute a program is a function of the number of instructions to execute, the average number of clock cycles required per instruction, and the clock cycle time:

3.        Write the rules for add/sub operation on floating point numbers.            (CO2)

In a computer, there is a tradeoff between range and precision - given a fixed number of binary digits (bits), precision can vary inversely with range. In this section, we overview decimal to FP conversion, MIPS FP instructions, and how registers are used for FP computations.

4.        Define Truncation.                                                                                  (CO2)

Truncation of positive real numbers can be done using the floor function. Given a number {\displaystyle x\in \mathbb {R} _{+}} to be truncated and {\displaystyle n\in \mathbb {N} _{0}}, the number of elements to be kept behind the decimal point, the truncated value of x is

{\displaystyle \operatorname {trunc} (x,n)={\frac {\lfloor 10^{n}\cdot x\rfloor }{10^{n}}}.}

5.        Define structural hazards.                                                                        (CO3)

For example, a structural hazard would occur if a processor tried to use the same memory port for both instructions and data. Structural hazards commonly are overcome by pipeliningMIPS instruction sets.

6.        What is branch folding?                                                                          (CO3)

Branch folding is a technique where, on the prediction of mostbranches, the branch instruction is completely removed from the instruction stream presented to the execution pipeline. 

7.        Define Strong scaling and weak scaling.                                                 (CO4)

The first is strong scaling, which is defined as how the solution time varies with the number of processors for a fixed total problem size. The second is weak scaling, which is defined as how the solution time varies with the number of processors for a fixed problem size per processor.

8.        Define multithreading.                                                                             (CO4)

In computer architecture, multithreading is the ability of a central processing unit (CPU) or a single core in a multi-core processor to execute multiple processes or threads concurrently, appropriately supported by the operating system.

9.        Define virtual memory.                                                                           (CO5)

In computing, virtual memory is a memory management technique that is implemented using both hardware and software. It maps memory addresses used by a program, called virtual addresses, into physical addresses in computer memory.

10.     What is SCSI?                                                                                         (CO5)

The Small Computer System Interface (SCSI) is a set of parallel interface standards developed by the American National Standards Institute (ANSI) for attaching printers, disk drives, scanners and other peripherals to computers. SCSI (pronounced "skuzzy") is supported by all major operating systems.

PART – B                                              13 x 5=65

11.a. Explain in detail about the eight ideas of computer architecture.                     (CO1)

Or

11.b. What are the various logical operations and explain the instructions supporting the logical operations                                                                                                          (CO1)(6+7)

12.a. Give the block diagram for a adder and revised  and discuss its operation. (CO2)

Or

12.b. Explain the Booth’s algorithm for multiplication of signed two’s complement numbers                                                                                                                               (CO2)

13 a. Briefly explain the speedup performance models for pipelining                     (CO3)

Or

13.b. Explain the data path and control consideration of a pipeline organization and explain                                                                                                                  (CO3)

14.a. Explain MISD and MIMD with an example                                                  (CO4)(6+7)

Or

14.b. Explain challenges in parallel processing.                                                      (CO4)

15.a. What is an interrupt? Explain the different types of interrupts and the different ways of handling the interrupts                                                                                           (CO5)(4+9)

Or

15.b. Write short note on I/O processor. Describe the functions of SCSI interface with a neat diagram                                                                                                                 (CO5)(5+8)

Part C                                                                                     1 x 15=15

16. Explain details about the operation used in windows 64 bit system. (CO2)

Or

16. Explain details about the Instruction architecture used in graphical system(CO3)