Wednesday, 11 October 2017

CS6303 CS8491 Computer Architecture

CS6303 Computer Architecture Nov/Dec 2016 Anna University Question Paper

ec8552-syllabus-computer-architecture-and-organization-regulation-2017-anna-university
CS6303 Computer Architecture Nov/Dec 2016 Anna University Question paper Nov/Dec 2016 Here you can get Previous Year Question paper Recent Question Papers 2marks syllabus 2013 regulation etc.  To Score more in your semester exams Get best score in your semester exams without any struggle. Just refer the previous year questions from our website. At the last time of examination you won’t be able to refer the whole book. We know students find it difficult to score better in university exams so we make it easy to assemble, use, and even reuse the frequently asked questions. We are a library of questions which are asked frequently, all you need to do is to refer our website and get the CS6303 Computer Architecture Anna university Question paper Nov/Dec 2016
Students who are already keeping good score should use previous questions only for reference. It may help you to get full score. For such students a small advice is that, after studying the entire portions, one can use these recent year questions for revision. Our recentquestionpaper.com is meant for practicing and revising what one has studied and for you to assure pass mark who find it difficult to study the full portion. It helps you to know the range of questions asked in semester exam.
Department of Computer Science and Engineering
Sub. Name: Computer Architecture                                   Sub.Code: CS6303
Max.Marks: 100                                                                     Time: 180 min
Department: Computer Science and Engineering             Sem/Year: III/II       Date:
Model Exam – I
PART – A                              10x 2=20
1.        What is instruction register?                                                                    (CO1)
In computing, an instruction register (IR) is the part of a CPU's control unit that holds the instruction currently being executed or decoded
2.        What is program counter?                                                                       (CO1)
program counter is a register in a computer processor that contains the address (location) of the instruction being executed at the current time. As each instruction gets fetched, the program counter increases its stored value by 1.
3.        What is arithmetic overflow?                                                                   (CO2)
In computer programming, an integer overflow occurs when an arithmetic operation attempts to create a numeric value that is outside of the range that can be represented with a given number of bits – either larger than the maximum or lower than the minimum representable value.
4.        What is Carry Save addition?                                                  (CO2)
carry-save adder is a type of digital adder, used in computer microarchitecture to compute the sum of three or more n-bit numbers in binary.
5.        What is meant by data hazard in pipelining?                                            (CO3)
Data hazards occur when the pipeline changes the order of read/write accesses to operands so that the order differs from the order seen by sequentially executing instructions on the unpipelined machine. 
6.        What is side effect?                                                                                 (CO3)
Side effect (computer science) In computer science, a function or expression is said to have a side effect if it modifies some state outside its scope or has an observableinteraction with its calling functions or the outside world besides returning a value.
7.        Define Reorder buffer.                                                                            (CO4)
re-order buffer (ROB) is used in a Tomasulo algorithm for out-of-order instruction execution. It allows instructions to be committed in-order. 
8.        What is In order commit?                                                                        (CO4)
re-order buffer (ROB) is used in a Tomasulo algorithm for out-of-order instruction execution. It allows instructions to be committed in-order. 

9.        Define write through and write buffer.                                                    (CO5)

Write-through cache directs write I/O onto cache and through to underlying permanent storage before confirming I/O completion to the host. 
10.     What is write-back?                                                                                 (CO5)
Write-back cache is where write I/O is directed to cache and completion is immediately confirmed to the host. This results in low latency and high throughput for write-intensive applications, but there is data availability exposure risk because the only copy of the written data is in cache. 
PART – B                                              13 x 5=65

11.a.Discuss in detail about Instruction performance and CPU performance of a computer                                                                                                                                   (CO1)
Or
11.b What are the various logical operations and explain the instructions supporting the logical operations.                                                                                                          (CO1)
12.a.Explain the floating point addition and subtraction                                          (CO2)(7+6)
Or
12.b. Give the block diagram for a adder and revised  and discuss its operation. (CO2)
13. a. Explain the data path and control consideration of a pipeline organization and explain                                                                                                                 (CO3)
Or
13.b. What is instruction hazards? Explain in detail how to handle the instruction hazards in pipelining with relevant examples                                                                           (CO3)(4+9)
14.a. Explain challenges in parallel processing                                                        (CO4)
Or
14.b. Explain in detail about Hardware multithreading                                            (CO4)
15.a. Discuss DMA controller with block diagram                                 (CO5)
Or
15.b. Explain the need for cache memory and discuss the different types of mapping functions with necessary block diagram                                                                             (CO5) (5+8)
Part C                                                                                     1 x 15=15
16. Explain details about the Instruction architecture used in graphical system(CO3)
Or

16. Explain details about the Intel core Processor and its architecture.(CO4)

No comments:

Post a Comment

CCS 365 Software Defined Network Lab Manual

 CCS 365 Software Defined Network Lab Manual 1) Setup your own virtual SDN lab i) Virtualbox/Mininet Environment for SDN - http://mininet.or...