CS6303 Computer Architecture Nov/Dec 2016 Anna University Question Paper
ec8552-syllabus-computer-architecture-and-organization-regulation-2017-anna-university
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Department of Computer Science and Engineering
Sub. Name: Computer Architecture Sub.Code: CS6303
Max.Marks: 100 Time: 180 min
Department: Computer Science and Engineering Sem/Year: III/II Date:
Model Exam – I
PART – A 10x 2=20
1.
What
is mainframe computer?
(CO1)
Mainframe computers (colloquially referred to as "big iron") arecomputers used
primarily by large organizations for critical applications, bulk data
processing, such as census, industry and consumer statistics, enterprise
resource planning, and transaction processing.
2.
Define
microcomputer. (CO1)
A microcomputer is
a small, relatively inexpensive computer with a microprocessor as its central
processing unit (CPU). It includes a microprocessor, memory, and minimal
input/output (I/O) circuitry mounted on a single printed circuit board.
3.
What
is overflow and underflow case in single precision? (CO2)
A processing system that determines whether an underflow or
overflow condition has occurred concurrently with the determination of the
floating point exponent result uses a group of latched constants which can be
added to the intermediate exponent and the exponent adjust to determine out of
range conditions for all cases.
4. Discuss the IEEE format used for
representing single- precision floating point numbers. (CO2)
Single-precision
floating-point format is a computer number format that
occupies 4 bytes (32 bits) in computer memory and represents a
wide dynamic range of values by using a floating point. In IEEE 754-2008
the 32-bit base-2 format is officially referred to as
binary32. It was called single in IEEE 754-1985.
5.
What
is pipeline register delay? (CO3)
Pipeline overhead arises from the combination of pipeline
register delay (setup time plus propagation delay) and clock
skew.
6.
What
is data path? (CO3)
A datapath is a collection of functional
units (such as arithmetic logic units or multipliers, that perform dataprocessing
operations), registers, and buses. Along with the control unit it composes the
central processing unit (CPU).
7.
Define
Register renaming. (CO4)
Register renaming is a form of pipelining that deals with data
dependences between instructions by renaming their register operands.
8.
Define
Commit unit. (CO4)
In Tomasulo algorithm, there is an additional stage "Commit". In this
stage, the results of instructions will be stored in a register or
memory.
9.
What
is cache memory? (CO5)
Cache memory is
a small-sized type of volatile computer memory that provides
high-speed data access to a processor and stores frequently used computer
programs, applications and data.
10.
What
is Direct mapped cache? (CO5)
In Full Associative Mapping Summary, the
address is broken into two parts: a tag used to identify which block is stored
in which line of the cache (s bits) and a fixed number of LSB
bits identifying the word within the block (w bits).
PART – B
13
x 5=65
11.
a.Explain
the architecture of a basic Computer system. (CO1)
Or
11.b Briefly discuss about Uniprocessor versus Multiprocessor and
CPU performance of a computer (CO1)(7+6)
12.a.Give the block diagram for a floating point adder and subtraction
unit and discuss its operation.
(CO2)
or
12.b. Explain in detail about the carry look ahead adder. (CO2)
13.a.Describe the techniques for handling control hazard in
pipelining(CO3)
Or
13.b. Briefly explain the speedup performance models for
pipelining(CO3)
14.a. Explain MISD and MIMD with an example (CO4)(7+6)
or
14.b.Discuss briefly about the motivation of Multi-core computing(CO4)
15.a Write short note on I/O processor. Describe the functions of
SCSI interface with a neat diagram (CO5)
or
15.b .Explain the need for memory hierarchy technology with a
four-level memory (CO5)
Part C
1 x 15=15
16. Explain details about the Intel core
Processor and its architecture.(CO4)
Or
16. Briefly explain the speedup performance
models for dual core processor pipelining(CO3)
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