Friday, 19 August 2016

CS6303 computer architecture


DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
Name of the Faculty
M.Robinson Joel
Academic Year   
:2016-2017
Subject code       
:CS6303 Computer Architecture
Subject Name     
: COMPUTER ARCHITECTURE
Syllabus              
:ANNA UNIVERSITY, CHENNAI
No. of Theory Hours
:3
Tutorial Hours
:Nil
Total Hours
:45


S.NO.
Topic to be covered
Duration
Reference
Teaching Method
1
Introduction
Eight Great Ideas in Computer Architecture
Text Book
BB/PPT
2
Components of a Computer System,
Technologies for Building Processors and Memory
Text Book
BB/PPT
3
Performance: Defining Performance, Measuring Performance, CPU Performance and Its Factors, Instruction Performance, The Classic CPU Performance Equation
Text Book
BB/PPT
4
Power Wall
Text Book
BB/PPT
5
The Switch from Uniprocessors to Multiprocessors
Text Book
BB/PPT
6
Instructions: Operations of the Computer Hardware
Operands of the Computer Hardware
Text Book
BB/PPT
7
Representing Instructions in the Computer
Text Book
BB/PPT
8
Logical Operations
Control Operations
Text Book
BB/PPT
9
Addressing and Addressing Modes
Text Book
BB/PPT

S.NO.
Topic to be covered
Duration
Reference
Teaching Method
10
ALU: Addition and Subtraction
Text Book
BB/PPT
11
Multiplication
Text Book
BB/PPT
12
Division
Text Book
BB/PPT
13
Floating Point Representations
Text Book
BB/PPT
14
Floating Point Addition
Text Book
BB/PPT
15
Floating Point Multiplication
Text Book
BB/PPT
16
Subword Parallelism: Data Level Parallelism
Text Book
BB/PPT

S.NO.
Topic to be covered
Duration
Reference
Teaching Method
17
Basic MIPS implementation

Text Book
BB/PPT
18
Building Datapath, Creating a Single Datapath
Text Book
BB/PPT
19
Control Implementation scheme: The ALU Control, Designing the Main Control Unit
Text Book
BB/PPT
20
The Simple Datapath with the Control Unit
Text Book
BB/PPT
21
An Overview of Pipelining, Single Cycle versus Pipelined Performance
Text Book
BB/PPT
22
Pipelined version of Datapath
Text Book
BB/PPT
23
Pipelined control: Adding  Control to the Pipelined Datapath
Text Book
BB/PPT
24
Handling Data hazards: Datapath to Resolve Hazards via Forwarding
Text Book
BB/PPT
25
Data hazards and Stalls
Text Book
BB/PPT
26
Control hazards: The Impact of Pipeline on the Branch Instruction , Reducing the Delay of  Branches, Dynamic Branch Prediction

Text Book
BB/PPT
27
Exceptions: How Exceptions are Handled in the MIPS Architecture, Exceptions in Pipelined Implementation


Text Book
BB/PPT

S.NO.
Topic to be covered
Duration
Reference
Teaching Method
28
Parallelism via Instructions-Instruction-level-parallelism: Software  based approach to exploiting Instruction Level Parallelism
Text Book
BB/PPT
29
Hardware based approach to exploiting Instruction Level Parallelism
Text Book
BB/PPT
30
Parallel processing challenges
Text Book
BB/PPT
31
Flynn's classification: SISD, MIMD, SIMD, SPMD and Vector
Text Book
BB/PPT
32
Hardware multithreading: Fine-Grained Multithreading, Coarse-Grained Multithreading
Text Book
BB/PPT
33
Simultaneous Multithreading
Text Book
BB/PPT
341
Multicore processors: The need for Multicore, Multicore Basics, CMP Architecture
Text Book
BB/PPT
351
Intel Multi-core architecture,  Homogeneous vs. Heterogeneous Cores
Text Book
BB/PPT
361
Cell Processors, Multicore Challenges
Text Book
BB/PPT


S.NO.
Topic to be covered
Duration
Reference
Teaching Method
37
Memory hierarchy - Memory technologies
R1
BB/PPT
38
Cache basics, Mapping Functions
R1
BB/PPT
39
Measuring and improving cache
Performance
R1
BB/PPT
40
Virtual memory Organization
R1
BB/PPT
41
Address Translation, TLB(Translation Lookaside Buffer)
R1
BB/PPT
42
Input/output system: programmed I/O
R1
BB/PPT
43
DMA(Direct Memory Access)- Arbitration Techniques
R1
BB/PPT
44
Interrupts
R1
BB/PPT
45
I/O Processors
R1
BB/PPT

TEXT BOOK:
1. David A. Patterson and John L. Hennessey, “Computer organization and design’, Morgan
Kauffman / Elsevier, Fifth edition, 2014.
REFERENCES:
1. V.Carl Hamacher, Zvonko G. Varanesic and Safat G. Zaky, “Computer Organisation“,
VI th edition, Mc Graw-Hill Inc, 2012.
2. William Stallings “Computer Organization and Architecture” , Seventh Edition , Pearson
Education, 2006.
3. Vincent P. Heuring, Harry F. Jordan, “Computer System Architecture”, Second Edition,
Pearson Education, 2005.
4. Govindarajalu, “Computer Architecture and Organization, Design Principles and Applications",first edition, Tata McGraw Hill, New Delhi, 2005.
5. John P. Hayes, “Computer Architecture and Organization”, Third Edition, Tata Mc Graw Hill,1998.
6. http://nptel.ac.in/.




Subject Incharge                                                       HOD/CSE
              

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