EC6009 Advance Computer Architecture
Internal Assessment - I Key
PART – A
Answer all
the questions 5 x 2 =10
1.
State
the formula for power dynamics .(CO1)
2.
Define antidependence with example ?.(CO1)
3.
How to measure the dependability? (CO1)
4.
Define ALU.(CO2)
5.
What is bandwidth and latency ?(CO2)
PART
– B 16
x 2 =32
6. Give a brief explanation to avoid data
dependence with dynamic scheduling. (CO2)16
7. Give a brief
explanation of trends in Power , Energy and Cost. (CO1) 16
8 Give a brief explanation to avoid control
dependence with hardware Speculation. (CO2)16
9. State and explain different generation of
Computer (CO1) 16
PART – C
10. Give a brief explanation about different
dependences in computer architecture. (CO2)8
Maximum:50Marks
Part-A
(2*5=10Marks)
- Define
ALU
An arithmetic logic unit (ALU) is a
digital circuit used to perform arithmetic and logic operations. It represents
the fundamental building block of the central processing unit (CPU) of a
computer. Modern CPUs contain very powerful and complex ALUs.
- DefineAnti
Dependence with examples
A data dependency in computer science is a situation in which a
program statement (instruction) refers to the data of a preceding statement. In
compiler theory, the technique used to discover data dependencies among
statements (or instructions) is called dependence analysis
- Define
measure of dependability
Dependability
is a measure of a system's availability, reliability, and its
maintainability, and maintenance support performance, and, in some cases, other
characteristics such as durability, safety and security.
- What
is the formula for power dynamics
Power = Capacitive Load * Voltage ^ 2 * Frequency Switched.
- What
is bandwidth and latency
Latency (execution time): time to finish a
fixed task • Throughput (bandwidth): number of tasks in fixed time • Different:
exploit parallelism for throughput, not latency (e.g., bread) • Often
contradictory (latency vs. throughput) • Will see many examples of this •
Choose definition of performance that matches your goals • Scientific program:
latency; web server: throughput?
Part-B
(13*2=26 Marks)
- a)
Give a brief explanation to avoid data dependence with dynamic
scheduling (16)
- DIV.D F0,F2,F4
- ADD.D F6,F0,F8
- S.D F6,0(R1)
- SUB.D F8,F10,F14
- MULT.D F6,F10,F8
Give a brief explanation to avoid control
dependence with hardware Speculation(16)
7. a)i)State and explain different generation of
Computer (8)
S.N.
|
Generation &
Description
|
1
|
The period of first
generation: 1946-1959. Vacuum tube based.
|
2
|
The period of second
generation: 1959-1965. Transistor based.
|
3
|
The period of third
generation: 1965-1971. Integrated Circuit based.
|
4
|
The period of fourth
generation: 1971-1980. VLSI microprocessor based.
|
5
|
The period of fifth
generation: 1980-onwards. ULSI microprocessor based
|
Give a brief explanation of trends in Power ,
Energy and Cost(16)
Capacitance (C): To first
order (i.e., the architect’s point of view rather than the more detailed view
of a circuit designer), aggregate load capacitance largely depends on the wire
lengths of on-chip structures. Supply
voltage (V): For decades, supply voltage (V or Vdd) has dropped steadily
with each technology generation Because
of its direct quadratic influence on dynamic power, this has amazing leverage
on power-aware design.
Activity factor (A): The
activity factor is a fraction between 0 and 1 that refers to how often wires
actually transition from 0 to 1 or 1 to 0. While the clock signal obviously
switches at its full frequency, most other wires in the design have activity
factors below 1. Strategies such as clock gating are used to save energy by
reducing activity factors during a hardware unit’s idle periods
Clock frequency ( f ): The
clock frequency has a fundamental and far-reaching impact on power dissipation.
Not only does clock frequency directly influence power dissipation, but it also
indirectly shapes power by its effect on supply voltage. Typically, maintaining
higher clock frequencies may require (in part) maintaining a higher supply
voltage
Dependencies
between instructions
Q Instructions often depend on each other in such a
way that a particular instruction cannot be executed until a preceding
instruction or even two or three preceding instructions have been executed.
•
1 Data dependencies
•
2 Control dependencies
3 Resource dependencies
Data dependencies
i1: load r1, a
i2: load r2, b
i3: load r3, r1, r2
i4: mul r1, r2, r4;
i5: div r1, r2, r4
mul r1, r2, r3
Control dependencies
jz zproc
:
zproc: load r1, x
:
actual path of
execution depends on the outcome of multiplication
impose dependencies on
the logical subsequent instructions
